Multiple semiconductor devices, such as transistors, diodes, and integrated circuits, are typically fabricated simultaneously together on a thin slice of semiconductor material, often referred to a substrate, wafer, and/or workpiece. In some methods for manufacturing such devices, the wafer is transported into a process module in which a thin film, or layer, of a material is deposited on an exposed surface of the wafer. Once the desired thickness of the layer of semiconductor material has been deposited the surface of the wafer, the wafer may undergo further processing within the process module, or it may be removed from the process module for packaging or additional processing. Methods for forming a thin film on a substrate include vacuum evaporation deposition, molecular beam epitaxy, variants of Chemical Vapor Deposition (CVD) (including low-pressure CVD, organometallic CVD and plasma-enhanced CVD) and Atomic Layer Epitaxy (ALE). ALE may also be referred to as Atomic Layer Deposition (ALD).
In all such processes, it is generally desirable to maximize the speed at which wafers can be processed by semiconductor processing systems, also known as throughput. Multi-chamber processing tools often utilize software schedulers in attempt to sequence the actions of the process tools (such as the transfer of wafers between different components of the tool) in the most efficient manner possible. However, conventional schedulers often place a considerable burden on human operators of the processing tool to manually determine, program, and adjust the sequence and timing of actions taken by the tool. In addition to waste (i.e., scrapped wafers) and inefficiencies introduced by human error on the part of such operators, conventional schedulers may not enable a multi-chamber processing tool to simultaneously process wafers using different recipes.
Conventional schedulers that rely on fixed timing definitions for the various actions taken by the processing tool (also known as “static scheduling”) often use the maximum time an action could possibly take, which in turn causes the processing tool to wait unnecessarily long periods of time between actions in cases where actions are completed faster than the statically-defined maximum time. Additionally, a static schedule typically must be completed for an entire collection of wafers before it can be modified or another schedule can be run. In cases where wafers are processed by a tool having multiple process modules, the scheduled sequence of actions from a conventional scheduler may not be compatible with the processing tool's capabilities and may cause, for example, wafers to be scrapped due to overexposure to certain processing gasses.
Conventional schedulers that attempt to allocate resources of the processor tool based on the availability of components of the tool (also known as “dynamic scheduling”) often fail to account for resource conflicts, and thus fail to achieve optimal throughput. Moreover, some conventional dynamic schedulers attempt to overcome resource conflicts by adding fixed delays for various processing steps, which further reduce throughput in order to resolve the conflicts. Embodiments of the present disclosure help semiconductor processing tools perform actions in a more efficient manner compared to conventional scheduling methods, thereby helping to maximize the throughput of the processing tools.